SiC Coated Graphite Procurement 2026: Navigating New Purity Standards and 8-Inch Demands

The landscape for Silicon Carbide (SiC) coated graphite susceptors is undergoing a fundamental shift in 2026. The era of chronic supply shortages has stabilized, but the goalposts for quality have moved dramatically. As semiconductor fabrication plants (fabs) accelerate their transition to 8-inch (200mm) SiC wafers, the tolerance for impurities, thermal mismatch, and coating defects has dropped to near zero.

For procurement teams and process engineers, sourcing SiC coated graphite is no longer just about securing capacity—it is about strict adherence to emerging material standards and rigorous supplier qualification.

This guide breaks down the new purity standards defining the 2026 market, the technical realities of 8-inch wafer requirements, and how to audit potential suppliers effectively.

Scope and limits (July 26, 2026): This guide is for global procurement, supplier-quality, and process-engineering teams evaluating CVD SiC-coated graphite susceptors for 150mm-to-200mm SiC epitaxy and MOCVD programs. It is not a substitute for chamber-specific OEM limits, thermal modeling, destructive coupon testing, or incoming inspection; treat the criteria below as RFQ and supplier-audit checkpoints to verify against your process window.

1. The Impetus for Change: The 8-Inch (200mm) Transition

The economics of power electronics—driven by electric vehicles (EVs) and renewable energy infrastructure—demand higher yields per wafer. The shift from 150mm to 200mm SiC wafers significantly reduces per-die costs, but it places immense strain on the thermal processing equipment.

When a SiC susceptor is scaled up to accommodate 200mm wafers, the physical laws governing thermal expansion and gas dynamics become less forgiving:

• Thermal Uniformity: A larger surface area makes it exponentially more difficult to maintain a uniform temperature profile during high-temperature ( $>1600^\circ\text{C}$ ) epitaxy.
• Wafer Bow and Slip: Even minor surface roughness (Ra $> 2\mu\text{m}$) or slight concavity/convexity in the susceptor pocket can induce stress in the rigid 8-inch SiC wafer, leading to crystallographic slip.
• Coating Stress: A larger graphite substrate expands more in absolute terms. If the Coefficient of Thermal Expansion (CTE) is not perfectly matched between the isostatic graphite and the CVD SiC coating, the risk of shear stress and coating delamination skyrockets.

2. Defining Purity in 2026: The T/CASAS Standards

Historically, the specification of "high purity graphite" was somewhat ambiguous, heavily reliant on proprietary supplier datasheets. In April 2025, the Third Generation Semiconductor Industry Technology Innovation Strategic Alliance (CASA) formalized the landscape with new targeted standards:

T/CASAS 036—2025 & T/CASAS 048—2025

These standards establish rigorous protocols for the Determination of Purity for Isostatic Graphite Components in SiC Single Crystal Growth, specifically mandating the use of Glow Discharge Mass Spectrometry (GDMS) for trace element analysis.

Why does this matter for procurement? Prior to these standards, a supplier might claim <20\text{ppm} total ash content based on bulk combustion testing. GDMS testing, however, provides part-per-billion (ppb) resolution for specific killer impurities like Iron (Fe), Vanadium (V), Aluminum (Al), and Boron (B).

In high-temperature vacuum environments, porous graphite outgasses. If these metallic impurities are present beneath the SiC coating, they will eventually find a microscopic pinhole and vent into the epitaxial chamber, causing unintentional background doping and destroying the batch yield.

3. Comparing Supplier Capabilities: What to Look For

To mitigate supply chain risks and ensure maximum yields, procurement must look past unit pricing. The table below outlines the key differentiators between legacy suppliers and premium partners aligned with 2026 standards.

4. 2026 Supplier Qualification Checklist

Before awarding an RFQ or sending a new vendor's susceptor into your epitaxy chamber for qualification runs, utilize this comprehensive checklist during the supplier audit:

• 1. Request the GDMS Data: Do not accept generic "High Purity" claims. Request a recent Certificate of Analysis (CoA) demonstrating part-per-billion analysis of Iron, Boron, and Aluminum.
• 2. Verify the Purification Sequence: Ensure the graphite is purified after primary machining but before the CVD coating process.
• 3. Audit the CVD Recipe: Confirm the supplier utilizes high-temperature ($>1100^\circ\text{C}$) CVD deposition rather than low-temperature rapid growth, ensuring a fully dense, non-porous SiC matrix.
• 4. Check CTE Alignment Data: Ask for the documented Coefficient of Thermal Expansion curves for both the specific lot of isostatic graphite and their standard SiC coating. The variance should be strictly controlled.
• 5. Review Surface Metrology: For 8-inch applications, confirm their metrology lab can accurately measure and certify surface roughness (Ra) and pocket concavity/convexity to prevent wafer slip.
• 6. Assess Cleanroom Packaging: Ensure finished susceptors are handled, inspected, and vacuum-sealed in a certified cleanroom environment to prevent surface contamination during transit.

5. Frequently Asked Questions (FAQ)

Q: If the CVD SiC coating is completely dense, why does the underlying graphite purity matter?
A: No coating is absolutely perfect at a microscopic level over thousands of thermal cycles. Micro-cracks, pinholes, or edge wear can eventually expose the substrate. If the underlying graphite is 5N+ pure (T/CASAS 036 compliant), a minor breach does not immediately poison the chamber. If the substrate is impure, a single pinhole will cause catastrophic batch failure.

Q: Are there alternatives to SiC coated graphite for extreme environments?
A: Yes. For specific ultra-high temperature or highly corrosive environments (e.g., using heavy silane or propane concentrations), Tantalum Carbide (TaC) coated graphite is gaining traction. However, SiC-coated graphite remains the industry standard for cost-effective MOCVD and SiC epitaxy.

Q: How does the transition to 8-inch wafers affect lead times for susceptors?
A: The machining tolerances and uniform CVD coating requirements for 8-inch susceptors are significantly harder to achieve, which has temporarily tightened lead times among top-tier suppliers. Developing dual-sourcing strategies with qualified premium vendors is highly recommended.

Q: Can we rely on our wafer OEM's provided susceptors exclusively?
A: While OEM susceptors are guaranteed to work, they often carry a significant markup. Qualifying independent, specialized graphite coating manufacturers can dramatically reduce your Total Cost of Ownership (TCO) without sacrificing quality, provided you use the rigorous qualification metrics outlined above.

6. Sources and References

1. T/CASAS 036—2025 and 048—2025 standards release: Public release note covering the April 2025 CASA standards for isostatic graphite purity testing and SiC single-crystal growth component applications. View standards release note
2. TrendForce 2025 SiC market insight: Industry analysis on the global SiC supply chain and the commercial transition from 150mm to 200mm wafers. Read market report
3. SGL Carbon SIGRAFINE SiC coating: Supplier technical overview describing CVD SiC coating on graphite, CTE matching, semiconductor use cases, and coating performance requirements. Review SiC coating overview
4. Mersen purified graphite and silicon carbide graphite: Technical brochure covering purified graphite, silicon carbide graphite, machining, and coating considerations for semiconductor and high-temperature applications. Download technical brochure